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Instruction level parallelism with software approaches ppt templates: >> http://flz.cloudz.pw/download?file=instruction+level+parallelism+with+software+approaches+ppt+templates << (Download)
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HW Support for More ILP X A = B op C Avoid branch prediction by turning branches into conditionally executed instructions: If (X) then A = B op C else NOP If false, then neither store result nor cause exception Expanded ISA of Alpha, MIPS, Presentation on theme: "ILP: Software Approaches"— Presentation transcript:.
Instruction Level Parallelism (ILP) Colin Stevens What is a parallel instruction? ILP is a measure of the number of instructions that can be performed during a single – A free PowerPoint PPT presentation (displayed as a Flash slide show) on PowerShow.com - id: 43ebad-YzExM.
A Quantitative Approach, Fifth Edition Possibility of a hazard; Order in which results must be calculated; Upper bound on exploitable instruction level parallelism Examples. OR instruction dependent on DADDU and DSUBU. Assume R4 isn't used after skip. Possible to move DSUBU before the branch. Introduction.
Transmeta approach—alternate VLIW strategy. • Limits to ILP. Page 4. • Problem: Can't find enough ILP within single block. • Solution: Pretend blocks are bigger! • Problem: But blocks aren't bigger! Solution 2: Let software make its best guess based on history (trace scheduling). • and then implement this in hardware
Pipelining become universal technique in 1985. ? Overlaps execution of instructions. ? Exploits “Instruction Level Parallelism (ILP)". ? Two main approaches: ? Dynamic > hardware-based. ? Used in server and desktop processors. ? Not used as extensively in Parallel Multiprogrammed. Microprocessors (PMP).
Chapter 4. Exploiting Instruction-Level Parallelism with Software Approaches. ???. ??????????. November 2004. EEF011 Computer Architecture. ?????
Apr 18, 2010 Instruction-Level Parallelism: Concepts and Challenges. • Basic Compiler Techniques for Exposing ILP Dynamic Scheduling: Examples and the Algorithm. • Hardware-Based Speculation. • Exploiting ILP Using An approach that relies on software technology to find parallelism, statically at compile time.
Outline Basic Compiler Techniques for Exposing ILP Static Branch Prediction Static Multiple Issue: The VLIW Approach Hardware Support for Exposing More Parallelism at Compiler Time H.W verses S.W Solutions. Presentation on theme: "Exploiting ILP with Software Approaches"— Presentation transcript: 1 Exploiting
Software pipelining and trace scheduling. 4.5 4.7 Studies of ILP. ILP is the principle that there are many instructions in code that don't depend on each other. That means it's possible to execute those instructions in parallel. .. fixed number of instructions (4-16) scheduled by the compiler; put operators into wide templates.
(Can put more on chip than can afford to turn on); Old CW: Sufficiently increasing Instruction Level Parallelism via compilers, innovation (Out-of-order, speculation, instruction set. software. hardware. Properties of a good abstraction. Lasts through many generations (portability); Used in many different ways (generality)
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